Fabricating semiconductor devices such as logic and memory devices typically includes processing a substrate such as a semiconductor wafer using a large number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices. Multiple semiconductor devices may be fabricated in an arrangement on a single semiconductor wafer and then separated into individual semiconductor devices.
Semiconductor devices may develop defects during the fabrication processes. Inspection processes are performed at various steps during a semiconductor manufacturing process to detect defects on a specimen. Inspection processes are an important part of fabricating semiconductor devices such as integrated circuits, becoming even more important to successfully manufacture acceptable semiconductor devices as the dimensions of semiconductor devices decrease. Detection of defects has become highly desirable as the dimensions of semiconductor devices decrease, as even relatively small defects may cause unwanted aberrations in the semiconductor devices.
One method of defect detection includes comparing wafer inspection images to wafer design data, where the wafer design data includes one or more care areas. The care areas indicate designs of interest with potential to be a defect location. Known methods of defining care areas, however, can be labor and/or computational intensive. As such, it would be desirable to provide a solution for improved wafer inspection and defect classification to resolve manufacturing issues and provide improved wafer inspection capabilities.